1. Field of the Invention
The present invention relates to techniques for transmitting data through electrical signals. More specifically, the present invention relates to a method and an apparatus for providing skew compensation through a self-timed source-synchronous network.
2. Related Art
As computer system clock speeds continue to increase at an exponential rate, it is becoming increasingly harder to synchronize communications between computer system components with reference to a centralized system clock. To deal with this problem, computer system designers are increasingly using source-synchronous techniques to communicate between computer system components.
Source-synchronous communication allows synchronous design to be used for interfaces with large uncertainties in the relative clock phase between the sender and receiver. Referring to FIG. 1A, existing designs are typically composed of a sender 102 and a receiver 104 that are coupled to a common frequency 106 reference to guarantee that they operate at exactly the same frequency. Sender 102 forwards its clock 108 along with data 110 that it is sending to receiver 104. Receiver 104 uses the forwarded clock 108 to load data from the transmitter into a first-in-first-out (FIFO) buffer 112. Receiver 104 subsequently uses its own version of the clock 114 to remove the data from the FIFO 112. Because the two clocks operate at the same frequency, FIFO 112 can be guaranteed to never overflow nor underflow. Note that these existing source-synchronous designs (such as the design illustrated in FIG. 1A) provide point-to-point communication.
However, in many applications, such as multiprocessors, graphics engines, and network interfaces, the communication structure is many-to-many. To implement this with traditional source-synchronous techniques, a synchronous switch fabric 120 can be used to couple the various system components together as is illustrated in FIG. 1B. This synchronous switch fabric 120 operates with reference to a system clock signal 122. Furthermore, a FIFO is included at each input of the switch fabric to align incoming data from each sender to the clock of the switch fabric. Additionally, a FIFO is added to each receiver of data to align data from the switch fabric to the receiver's clock. Note that each FIFO along a transmission path increases the latency through the interface.
Hence, what is needed is a method and an apparatus for providing many-to-many communication while minimizing the additional latency arising from additional FIFOs along the transmission path.